HD74LS293P (Not recommend for new design)

Integrated Circuit

HD74LS293 4-bit Binary Counter

This counter contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and divide- by-eight counter. This counter has a gated zero reset. To use the maximum count length of this counter, the B input is connected to the QA output. The input count pulses are applied to input A and the outputs are as described in the appropriate function table.