HEF4024BP


Integrated Circuit


HEF4024BP


HEF4024B MSI 7-stage binary counter


The HEF4024B is a 7-stage binary ripple counter with a clock input (CP), and overriding asynchronous master reset input (MR) and seven fully buffered parallel outputs (O0 to O6). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of CP. Each counter stage is a static toggle flip-flop.


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Sketches:

  1. HEF4024BP MSI 7-stage binary counter